Semiconductor storage device and manufacturing method of the same

半導体記憶装置及びその製造方法

Abstract

【課題】ビット線に拡散層を用いる半導体記憶装置のチャネル領域に発生する2次電子を抑制して信頼性を向上できるようにする。 【解決手段】半導体記憶装置100は、P型の半導体基板101の上部にそれぞれが互いに並行に延びるように形成された複数のビット線拡散層108と、半導体基板101の上で、且つそれぞれが各ビット線拡散層108と交差する方向に互いに並行に延びるように形成された複数のワード線電極110とを有している。さらに、半導体基板101における各ワード線電極110の下方の領域には、周囲よりも濃度が低いP型の複数の第3の不純物層111Aがそれぞれ自己整合的に形成されている。 【選択図】図2
PROBLEM TO BE SOLVED: To provide a semiconductor storage device and a manufacturing method of the same which improves reliability by inhibiting secondary electrons generated in a channel region of the semiconductor storage device using a diffusion layer for a bit line.SOLUTION: The semiconductor storage device 100 comprises a plurality of bit line diffusion layers 108 formed above a p-type semiconductor substrate 101 in such a manner as to extend in parallel with each other, and a plurality of word line electrodes 110 formed above the semiconductor substrate 101 in such a manner as to extend in a direction respectively crossing the bit line diffusion layers 108 and in parallel with each other. A plurality of P-type third impurity layers 111A with a concentration lower than that of a surrounding region are formed in a region on the semiconductor substrate 101 below respective word line electrodes 110 each in a self-aligning manner.

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